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8355913: RISC-V: improve hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java

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Reviewed-by: fyang, rehn
This commit is contained in:
Hamlin Li 2025-05-01 08:15:24 +00:00
parent 0a697f6ff4
commit 0cd0afb2b3
3 changed files with 10 additions and 8 deletions
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3
src/hotspot/cpu/riscv/riscv.ad
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@ -1916,9 +1916,10 @@ bool Matcher::match_rule_supported(int opcode) {
case Op_FmaF:
case Op_FmaD:
return UseFMA;
case Op_FmaVF:
case Op_FmaVD:
return UseFMA;
return UseRVV && UseFMA;
case Op_ConvHF2F:
case Op_ConvF2HF:

1
test/hotspot/jtreg/compiler/lib/ir_framework/TestFramework.java
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@ -142,6 +142,7 @@ public class TestFramework {
"Xlog",
"LogCompilation",
"UseCompactObjectHeaders",
"UseFMA",
// Riscv
"UseRVV",
"UseZbb",

14
test/hotspot/jtreg/compiler/vectorization/runner/BasicFloatOpTest.java
View File

@ -35,7 +35,7 @@
* -XX:+WhiteBoxAPI
* compiler.vectorization.runner.BasicFloatOpTest
*
* @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64")
* @requires (os.simpleArch == "x64") | (os.simpleArch == "aarch64") | (os.simpleArch == "riscv64")
* @requires vm.compiler2.enabled
*/
@ -229,7 +229,7 @@ public class BasicFloatOpTest extends VectorizationTestRunner {
counts = {IRNode.FMA_VF, ">0", IRNode.VFMLA, ">0"})
@IR(applyIfCPUFeatureAnd = {"fma", "true", "avx", "true"},
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeature = {"rvv", "true"},
@IR(applyIfCPUFeature = {"rvv", "true"}, applyIf = {"UseFMA", "true"},
counts = {IRNode.FMA_VF, ">0"})
public float[] vectorMulAdd() {
float[] res = new float[SIZE];
@ -244,7 +244,7 @@ public class BasicFloatOpTest extends VectorizationTestRunner {
counts = {IRNode.FMA_VF, ">0", IRNode.VFMLS, ">0"})
@IR(applyIfCPUFeatureAnd = {"fma", "true", "avx", "true"},
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeature = {"rvv", "true"},
@IR(applyIfCPUFeature = {"rvv", "true"}, applyIf = {"UseFMA", "true"},
counts = {IRNode.FMA_VF, ">0"})
public float[] vectorMulSub1() {
float[] res = new float[SIZE];
@ -259,7 +259,7 @@ public class BasicFloatOpTest extends VectorizationTestRunner {
counts = {IRNode.FMA_VF, ">0", IRNode.VFMLS, ">0"})
@IR(applyIfCPUFeatureAnd = {"fma", "true", "avx", "true"},
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeature = {"rvv", "true"},
@IR(applyIfCPUFeature = {"rvv", "true"}, applyIf = {"UseFMA", "true"},
counts = {IRNode.FMA_VF, ">0"})
public float[] vectorMulSub2() {
float[] res = new float[SIZE];
@ -276,7 +276,7 @@ public class BasicFloatOpTest extends VectorizationTestRunner {
counts = {IRNode.VFNMLA, ">0"})
@IR(applyIfCPUFeatureAnd = {"fma", "true", "avx", "true"},
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeature = {"rvv", "true"},
@IR(applyIfCPUFeature = {"rvv", "true"}, applyIf = {"UseFMA", "true"},
counts = {IRNode.FMA_VF, ">0"})
public float[] vectorNegateMulAdd1() {
float[] res = new float[SIZE];
@ -293,7 +293,7 @@ public class BasicFloatOpTest extends VectorizationTestRunner {
counts = {IRNode.VFNMLA, ">0"})
@IR(applyIfCPUFeatureAnd = {"fma", "true", "avx", "true"},
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeature = {"rvv", "true"},
@IR(applyIfCPUFeature = {"rvv", "true"}, applyIf = {"UseFMA", "true"},
counts = {IRNode.FMA_VF, ">0"})
public float[] vectorNegateMulAdd2() {
float[] res = new float[SIZE];
@ -308,7 +308,7 @@ public class BasicFloatOpTest extends VectorizationTestRunner {
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeatureAnd = {"fma", "true", "avx", "true"},
counts = {IRNode.FMA_VF, ">0"})
@IR(applyIfCPUFeature = {"rvv", "true"},
@IR(applyIfCPUFeature = {"rvv", "true"}, applyIf = {"UseFMA", "true"},
counts = {IRNode.FMA_VF, ">0"})
public float[] vectorNegateMulSub() {
float[] res = new float[SIZE];