8358634: RISC-V: Fix several broken documentation web-links

Reviewed-by: fyang
This commit is contained in:
Dingli Zhang 2025-06-05 07:34:48 +00:00 committed by Fei Yang
parent 08023481ed
commit 48b97ac0e0
2 changed files with 4 additions and 4 deletions

View File

@ -666,7 +666,7 @@ class MacroAssembler: public Assembler {
// We try to follow risc-v asm menomics.
// But as we don't layout a reachable GOT,
// we often need to resort to movptr, li <48imm>.
// https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md
// https://github.com/riscv-non-isa/riscv-asm-manual/blob/main/src/asm-manual.adoc
// Hotspot only use the standard calling convention using x1/ra.
// The alternative calling convection using x5/t0 is not used.

View File

@ -221,13 +221,13 @@ class VM_Version : public Abstract_VM_Version {
FLAG_SET_DEFAULT(UseExtension, true); \
} \
// https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#rva20-profiles
// https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#rva20-profiles
#define RV_USE_RVA20U64 \
RV_ENABLE_EXTENSION(UseRVC) \
static void useRVA20U64Profile();
// https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#rva22-profiles
// https://github.com/riscv/riscv-profiles/blob/main/src/profiles.adoc#rva22-profiles
#define RV_USE_RVA22U64 \
RV_ENABLE_EXTENSION(UseRVC) \
RV_ENABLE_EXTENSION(UseZba) \
@ -241,7 +241,7 @@ class VM_Version : public Abstract_VM_Version {
static void useRVA22U64Profile();
// https://github.com/riscv/riscv-profiles/blob/main/rva23-profile.adoc#rva23u64-profile
// https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23u64-profile
#define RV_USE_RVA23U64 \
RV_ENABLE_EXTENSION(UseRVC) \
RV_ENABLE_EXTENSION(UseRVV) \