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8320564: RISC-V: Minimal build failed after JDK-8316592

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Reviewed-by: fyang, shade
This commit is contained in:
Feilong Jiang 2023-11-23 00:50:27 +00:00
parent 2bb4b9398d
commit 864b39a893
2 changed files with 21 additions and 21 deletions
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35
src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
View File

@ -2048,23 +2048,6 @@ void MacroAssembler::cmp_klass(Register oop, Register trial_klass, Register tmp1
beq(trial_klass, tmp1, L); beq(trial_klass, tmp1, L);
} }
// Multiply and multiply-accumulate unsigned 64-bit registers.
void MacroAssembler::wide_mul(Register prod_lo, Register prod_hi, Register n, Register m) {
assert_different_registers(prod_lo, prod_hi);
mul(prod_lo, n, m);
mulhu(prod_hi, n, m);
}
void MacroAssembler::wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2) {
assert_different_registers(sum_lo, sum_hi);
assert_different_registers(sum_hi, tmp2);
wide_mul(tmp1, tmp2, n, m);
cad(sum_lo, sum_lo, tmp1, tmp1); // Add tmp1 to sum_lo with carry output to tmp1
adc(sum_hi, sum_hi, tmp2, tmp1); // Add tmp2 with carry to sum_hi
}
// Move an oop into a register. // Move an oop into a register.
void MacroAssembler::movoop(Register dst, jobject obj) { void MacroAssembler::movoop(Register dst, jobject obj) {
int oop_index; int oop_index;
@ -3576,6 +3559,24 @@ void MacroAssembler::mul_add(Register out, Register in, Register offset,
bind(L_end); bind(L_end);
} }
// Multiply and multiply-accumulate unsigned 64-bit registers.
void MacroAssembler::wide_mul(Register prod_lo, Register prod_hi, Register n, Register m) {
assert_different_registers(prod_lo, prod_hi);
mul(prod_lo, n, m);
mulhu(prod_hi, n, m);
}
void MacroAssembler::wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2) {
assert_different_registers(sum_lo, sum_hi);
assert_different_registers(sum_hi, tmp2);
wide_mul(tmp1, tmp2, n, m);
cad(sum_lo, sum_lo, tmp1, tmp1); // Add tmp1 to sum_lo with carry output to tmp1
adc(sum_hi, sum_hi, tmp2, tmp1); // Add tmp2 with carry to sum_hi
}
// add two unsigned input and output carry // add two unsigned input and output carry
void MacroAssembler::cad(Register dst, Register src1, Register src2, Register carry) void MacroAssembler::cad(Register dst, Register src1, Register src2, Register carry)
{ {

7
src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
View File

@ -198,10 +198,6 @@ class MacroAssembler: public Assembler {
void store_klass(Register dst, Register src, Register tmp = t0); void store_klass(Register dst, Register src, Register tmp = t0);
void cmp_klass(Register oop, Register trial_klass, Register tmp1, Register tmp2, Label &L); void cmp_klass(Register oop, Register trial_klass, Register tmp1, Register tmp2, Label &L);
void wide_mul(Register prod_lo, Register prod_hi, Register n, Register m);
void wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2);
void encode_klass_not_null(Register r, Register tmp = t0); void encode_klass_not_null(Register r, Register tmp = t0);
void decode_klass_not_null(Register r, Register tmp = t0); void decode_klass_not_null(Register r, Register tmp = t0);
void encode_klass_not_null(Register dst, Register src, Register tmp); void encode_klass_not_null(Register dst, Register src, Register tmp);
@ -1204,6 +1200,9 @@ public:
#ifdef COMPILER2 #ifdef COMPILER2
void mul_add(Register out, Register in, Register offset, void mul_add(Register out, Register in, Register offset,
Register len, Register k, Register tmp); Register len, Register k, Register tmp);
void wide_mul(Register prod_lo, Register prod_hi, Register n, Register m);
void wide_madd(Register sum_lo, Register sum_hi, Register n,
Register m, Register tmp1, Register tmp2);
void cad(Register dst, Register src1, Register src2, Register carry); void cad(Register dst, Register src1, Register src2, Register carry);
void cadc(Register dst, Register src1, Register src2, Register carry); void cadc(Register dst, Register src1, Register src2, Register carry);
void adc(Register dst, Register src1, Register src2, Register carry); void adc(Register dst, Register src1, Register src2, Register carry);