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7035713: 3DNow Prefetch Instruction Support

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The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.

Reviewed-by: kvn
This commit is contained in:
Tom Deneau 2011-04-11 15:30:31 -07:00 committed by Vladimir Kozlov
parent 93459f517d
commit 899faa3fec
5 changed files with 25 additions and 25 deletions
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4
hotspot/src/cpu/x86/vm/assembler_x86.cpp
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@ -2317,7 +2317,7 @@ void Assembler::prefetchnta(Address src) {
} }
void Assembler::prefetchr(Address src) { void Assembler::prefetchr(Address src) {
NOT_LP64(assert(VM_Version::supports_3dnow(), "must support")); NOT_LP64(assert(VM_Version::supports_3dnow_prefetch(), "must support"));
InstructionMark im(this); InstructionMark im(this);
prefetch_prefix(src); prefetch_prefix(src);
emit_byte(0x0D); emit_byte(0x0D);
@ -2349,7 +2349,7 @@ void Assembler::prefetcht2(Address src) {
} }
void Assembler::prefetchw(Address src) { void Assembler::prefetchw(Address src) {
NOT_LP64(assert(VM_Version::supports_3dnow(), "must support")); NOT_LP64(assert(VM_Version::supports_3dnow_prefetch(), "must support"));
InstructionMark im(this); InstructionMark im(this);
prefetch_prefix(src); prefetch_prefix(src);
emit_byte(0x0D); emit_byte(0x0D);

4
hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
View File

@ -1401,7 +1401,7 @@ void LIR_Assembler::prefetchr(LIR_Opr src) {
default: default:
ShouldNotReachHere(); break; ShouldNotReachHere(); break;
} }
} else if (VM_Version::supports_3dnow()) { } else if (VM_Version::supports_3dnow_prefetch()) {
__ prefetchr(from_addr); __ prefetchr(from_addr);
} }
} }
@ -1424,7 +1424,7 @@ void LIR_Assembler::prefetchw(LIR_Opr src) {
default: default:
ShouldNotReachHere(); break; ShouldNotReachHere(); break;
} }
} else if (VM_Version::supports_3dnow()) { } else if (VM_Version::supports_3dnow_prefetch()) {
__ prefetchw(from_addr); __ prefetchw(from_addr);
} }
} }

17
hotspot/src/cpu/x86/vm/vm_version_x86.cpp
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@ -348,7 +348,7 @@ void VM_Version::get_processor_features() {
} }
char buf[256]; char buf[256];
jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
cores_per_cpu(), threads_per_core(), cores_per_cpu(), threads_per_core(),
cpu_family(), _model, _stepping, cpu_family(), _model, _stepping,
(supports_cmov() ? ", cmov" : ""), (supports_cmov() ? ", cmov" : ""),
@ -363,8 +363,7 @@ void VM_Version::get_processor_features() {
(supports_sse4_2() ? ", sse4.2" : ""), (supports_sse4_2() ? ", sse4.2" : ""),
(supports_popcnt() ? ", popcnt" : ""), (supports_popcnt() ? ", popcnt" : ""),
(supports_mmx_ext() ? ", mmxext" : ""), (supports_mmx_ext() ? ", mmxext" : ""),
(supports_3dnow() ? ", 3dnow" : ""), (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
(supports_3dnow2() ? ", 3dnowext" : ""),
(supports_lzcnt() ? ", lzcnt": ""), (supports_lzcnt() ? ", lzcnt": ""),
(supports_sse4a() ? ", sse4a": ""), (supports_sse4a() ? ", sse4a": ""),
(supports_ht() ? ", ht": "")); (supports_ht() ? ", ht": ""));
@ -522,13 +521,13 @@ void VM_Version::get_processor_features() {
// set valid Prefetch instruction // set valid Prefetch instruction
if( ReadPrefetchInstr < 0 ) ReadPrefetchInstr = 0; if( ReadPrefetchInstr < 0 ) ReadPrefetchInstr = 0;
if( ReadPrefetchInstr > 3 ) ReadPrefetchInstr = 3; if( ReadPrefetchInstr > 3 ) ReadPrefetchInstr = 3;
if( ReadPrefetchInstr == 3 && !supports_3dnow() ) ReadPrefetchInstr = 0; if( ReadPrefetchInstr == 3 && !supports_3dnow_prefetch() ) ReadPrefetchInstr = 0;
if( !supports_sse() && supports_3dnow() ) ReadPrefetchInstr = 3; if( !supports_sse() && supports_3dnow_prefetch() ) ReadPrefetchInstr = 3;
if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0; if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0;
if( AllocatePrefetchInstr > 3 ) AllocatePrefetchInstr = 3; if( AllocatePrefetchInstr > 3 ) AllocatePrefetchInstr = 3;
if( AllocatePrefetchInstr == 3 && !supports_3dnow() ) AllocatePrefetchInstr=0; if( AllocatePrefetchInstr == 3 && !supports_3dnow_prefetch() ) AllocatePrefetchInstr=0;
if( !supports_sse() && supports_3dnow() ) AllocatePrefetchInstr = 3; if( !supports_sse() && supports_3dnow_prefetch() ) AllocatePrefetchInstr = 3;
// Allocation prefetch settings // Allocation prefetch settings
intx cache_line_size = L1_data_cache_line_size(); intx cache_line_size = L1_data_cache_line_size();
@ -576,10 +575,10 @@ void VM_Version::get_processor_features() {
logical_processors_per_package()); logical_processors_per_package());
tty->print_cr("UseSSE=%d",UseSSE); tty->print_cr("UseSSE=%d",UseSSE);
tty->print("Allocation: "); tty->print("Allocation: ");
if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow()) { if (AllocatePrefetchStyle <= 0 || UseSSE == 0 && !supports_3dnow_prefetch()) {
tty->print_cr("no prefetching"); tty->print_cr("no prefetching");
} else { } else {
if (UseSSE == 0 && supports_3dnow()) { if (UseSSE == 0 && supports_3dnow_prefetch()) {
tty->print("PREFETCHW"); tty->print("PREFETCHW");
} else if (UseSSE >= 1) { } else if (UseSSE >= 1) {
if (AllocatePrefetchInstr == 0) { if (AllocatePrefetchInstr == 0) {

11
hotspot/src/cpu/x86/vm/vm_version_x86.hpp
View File

@ -188,7 +188,8 @@ protected:
CPU_FXSR = (1 << 2), CPU_FXSR = (1 << 2),
CPU_HT = (1 << 3), CPU_HT = (1 << 3),
CPU_MMX = (1 << 4), CPU_MMX = (1 << 4),
CPU_3DNOW = (1 << 5), // 3DNow comes from cpuid 0x80000001 (EDX) CPU_3DNOW_PREFETCH = (1 << 5), // Processor supports 3dnow prefetch and prefetchw instructions
// may not necessarily support other 3dnow instructions
CPU_SSE = (1 << 6), CPU_SSE = (1 << 6),
CPU_SSE2 = (1 << 7), CPU_SSE2 = (1 << 7),
CPU_SSE3 = (1 << 8), // SSE3 comes from cpuid 1 (ECX) CPU_SSE3 = (1 << 8), // SSE3 comes from cpuid 1 (ECX)
@ -328,8 +329,9 @@ protected:
// AMD features. // AMD features.
if (is_amd()) { if (is_amd()) {
if (_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) if ((_cpuid_info.ext_cpuid1_edx.bits.tdnow != 0) ||
result |= CPU_3DNOW; (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0))
result |= CPU_3DNOW_PREFETCH;
if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0) if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0)
result |= CPU_LZCNT; result |= CPU_LZCNT;
if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0) if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
@ -446,9 +448,8 @@ public:
// //
// AMD features // AMD features
// //
static bool supports_3dnow() { return (_cpuFeatures & CPU_3DNOW) != 0; } static bool supports_3dnow_prefetch() { return (_cpuFeatures & CPU_3DNOW_PREFETCH) != 0; }
static bool supports_mmx_ext() { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.mmx_amd != 0; } static bool supports_mmx_ext() { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.mmx_amd != 0; }
static bool supports_3dnow2() { return is_amd() && _cpuid_info.ext_cpuid1_edx.bits.tdnow2 != 0; }
static bool supports_lzcnt() { return (_cpuFeatures & CPU_LZCNT) != 0; } static bool supports_lzcnt() { return (_cpuFeatures & CPU_LZCNT) != 0; }
static bool supports_sse4a() { return (_cpuFeatures & CPU_SSE4A) != 0; } static bool supports_sse4a() { return (_cpuFeatures & CPU_SSE4A) != 0; }

14
hotspot/src/cpu/x86/vm/x86_32.ad
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@ -3423,7 +3423,7 @@ encode %{
masm.movptr(boxReg, tmpReg); // consider: LEA box, [tmp-2] masm.movptr(boxReg, tmpReg); // consider: LEA box, [tmp-2]
// Using a prefetchw helps avoid later RTS->RTO upgrades and cache probes // Using a prefetchw helps avoid later RTS->RTO upgrades and cache probes
if ((EmitSync & 2048) && VM_Version::supports_3dnow() && os::is_MP()) { if ((EmitSync & 2048) && VM_Version::supports_3dnow_prefetch() && os::is_MP()) {
// prefetchw [eax + Offset(_owner)-2] // prefetchw [eax + Offset(_owner)-2]
masm.prefetchw(Address(rax, ObjectMonitor::owner_offset_in_bytes()-2)); masm.prefetchw(Address(rax, ObjectMonitor::owner_offset_in_bytes()-2));
} }
@ -3467,7 +3467,7 @@ encode %{
masm.movptr(boxReg, tmpReg) ; masm.movptr(boxReg, tmpReg) ;
// Using a prefetchw helps avoid later RTS->RTO upgrades and cache probes // Using a prefetchw helps avoid later RTS->RTO upgrades and cache probes
if ((EmitSync & 2048) && VM_Version::supports_3dnow() && os::is_MP()) { if ((EmitSync & 2048) && VM_Version::supports_3dnow_prefetch() && os::is_MP()) {
// prefetchw [eax + Offset(_owner)-2] // prefetchw [eax + Offset(_owner)-2]
masm.prefetchw(Address(rax, ObjectMonitor::owner_offset_in_bytes()-2)); masm.prefetchw(Address(rax, ObjectMonitor::owner_offset_in_bytes()-2));
} }
@ -3614,7 +3614,7 @@ encode %{
// See also http://gee.cs.oswego.edu/dl/jmm/cookbook.html. // See also http://gee.cs.oswego.edu/dl/jmm/cookbook.html.
masm.get_thread (boxReg) ; masm.get_thread (boxReg) ;
if ((EmitSync & 4096) && VM_Version::supports_3dnow() && os::is_MP()) { if ((EmitSync & 4096) && VM_Version::supports_3dnow_prefetch() && os::is_MP()) {
// prefetchw [ebx + Offset(_owner)-2] // prefetchw [ebx + Offset(_owner)-2]
masm.prefetchw(Address(rbx, ObjectMonitor::owner_offset_in_bytes()-2)); masm.prefetchw(Address(rbx, ObjectMonitor::owner_offset_in_bytes()-2));
} }
@ -7333,7 +7333,7 @@ instruct loadSSD(regD dst, stackSlotD src) %{
// Must be safe to execute with invalid address (cannot fault). // Must be safe to execute with invalid address (cannot fault).
instruct prefetchr0( memory mem ) %{ instruct prefetchr0( memory mem ) %{
predicate(UseSSE==0 && !VM_Version::supports_3dnow()); predicate(UseSSE==0 && !VM_Version::supports_3dnow_prefetch());
match(PrefetchRead mem); match(PrefetchRead mem);
ins_cost(0); ins_cost(0);
size(0); size(0);
@ -7343,7 +7343,7 @@ instruct prefetchr0( memory mem ) %{
%} %}
instruct prefetchr( memory mem ) %{ instruct prefetchr( memory mem ) %{
predicate(UseSSE==0 && VM_Version::supports_3dnow() || ReadPrefetchInstr==3); predicate(UseSSE==0 && VM_Version::supports_3dnow_prefetch() || ReadPrefetchInstr==3);
match(PrefetchRead mem); match(PrefetchRead mem);
ins_cost(100); ins_cost(100);
@ -7387,7 +7387,7 @@ instruct prefetchrT2( memory mem ) %{
%} %}
instruct prefetchw0( memory mem ) %{ instruct prefetchw0( memory mem ) %{
predicate(UseSSE==0 && !VM_Version::supports_3dnow()); predicate(UseSSE==0 && !VM_Version::supports_3dnow_prefetch());
match(PrefetchWrite mem); match(PrefetchWrite mem);
ins_cost(0); ins_cost(0);
size(0); size(0);
@ -7397,7 +7397,7 @@ instruct prefetchw0( memory mem ) %{
%} %}
instruct prefetchw( memory mem ) %{ instruct prefetchw( memory mem ) %{
predicate(UseSSE==0 && VM_Version::supports_3dnow() || AllocatePrefetchInstr==3); predicate(UseSSE==0 && VM_Version::supports_3dnow_prefetch() || AllocatePrefetchInstr==3);
match( PrefetchWrite mem ); match( PrefetchWrite mem );
ins_cost(100); ins_cost(100);