8280867: Cpuid1Ecx feature parsing is incorrect for AMD CPUs
Reviewed-by: kvn, dlong
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fdd9ca74bd
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a18beb4797
@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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*
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* This code is free software; you can redistribute it and/or modify it
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* This code is free software; you can redistribute it and/or modify it
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@ -148,12 +148,11 @@ class VM_Version : public Abstract_VM_Version {
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uint32_t LahfSahf : 1,
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uint32_t LahfSahf : 1,
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CmpLegacy : 1,
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CmpLegacy : 1,
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: 3,
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: 3,
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lzcnt_intel : 1,
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lzcnt : 1,
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lzcnt : 1,
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sse4a : 1,
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sse4a : 1,
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misalignsse : 1,
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misalignsse : 1,
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prefetchw : 1,
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prefetchw : 1,
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: 22;
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: 23;
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} bits;
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} bits;
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};
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};
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@ -640,10 +639,10 @@ protected:
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// Intel features.
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// Intel features.
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if (is_intel()) {
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if (is_intel()) {
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if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0)
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if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0) {
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result |= CPU_LZCNT;
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result |= CPU_LZCNT;
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// for Intel, ecx.bits.misalignsse bit (bit 8) indicates support for prefetchw
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}
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if (_cpuid_info.ext_cpuid1_ecx.bits.misalignsse != 0) {
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if (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0) {
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result |= CPU_3DNOW_PREFETCH;
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result |= CPU_3DNOW_PREFETCH;
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}
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}
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if (_cpuid_info.sef_cpuid7_ebx.bits.clwb != 0) {
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if (_cpuid_info.sef_cpuid7_ebx.bits.clwb != 0) {
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@ -655,10 +654,10 @@ protected:
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// ZX features.
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// ZX features.
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if (is_zx()) {
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if (is_zx()) {
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if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0)
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if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0) {
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result |= CPU_LZCNT;
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result |= CPU_LZCNT;
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// for ZX, ecx.bits.misalignsse bit (bit 8) indicates support for prefetchw
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}
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if (_cpuid_info.ext_cpuid1_ecx.bits.misalignsse != 0) {
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if (_cpuid_info.ext_cpuid1_ecx.bits.prefetchw != 0) {
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result |= CPU_3DNOW_PREFETCH;
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result |= CPU_3DNOW_PREFETCH;
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}
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}
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}
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}
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