526 lines
19 KiB
C++
526 lines
19 KiB
C++
/*
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* Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012, 2021 SAP SE. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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// no precompiled headers
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#include "assembler_ppc.hpp"
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#include "asm/assembler.inline.hpp"
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#include "classfile/vmSymbols.hpp"
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#include "code/codeCache.hpp"
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#include "code/icBuffer.hpp"
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#include "code/vtableStubs.hpp"
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#include "interpreter/interpreter.hpp"
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#include "jvm.h"
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#include "memory/allocation.inline.hpp"
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#include "nativeInst_ppc.hpp"
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#include "os_linux.hpp"
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#include "os_posix.hpp"
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#include "prims/jniFastGetField.hpp"
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#include "prims/jvm_misc.hpp"
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#include "runtime/arguments.hpp"
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#include "runtime/frame.inline.hpp"
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#include "runtime/interfaceSupport.inline.hpp"
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#include "runtime/java.hpp"
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#include "runtime/javaCalls.hpp"
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#include "runtime/javaThread.hpp"
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#include "runtime/mutexLocker.hpp"
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#include "runtime/os.inline.hpp"
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#include "runtime/osThread.hpp"
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#include "runtime/safepointMechanism.hpp"
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#include "runtime/sharedRuntime.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "runtime/timer.hpp"
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#include "runtime/vm_version.hpp"
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#include "signals_posix.hpp"
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#include "utilities/debug.hpp"
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#include "utilities/events.hpp"
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#include "utilities/vmError.hpp"
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// put OS-includes here
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# include <sys/types.h>
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# include <sys/mman.h>
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# include <pthread.h>
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# include <signal.h>
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# include <errno.h>
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# include <dlfcn.h>
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# include <stdlib.h>
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# include <stdio.h>
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# include <unistd.h>
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# include <sys/resource.h>
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# include <pthread.h>
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# include <sys/stat.h>
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# include <sys/time.h>
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# include <sys/utsname.h>
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# include <sys/socket.h>
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# include <sys/wait.h>
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# include <pwd.h>
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# include <poll.h>
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# include <ucontext.h>
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address os::current_stack_pointer() {
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return (address)__builtin_frame_address(0);
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}
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char* os::non_memory_address_word() {
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// Must never look like an address returned by reserve_memory,
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// even in its subfields (as defined by the CPU immediate fields,
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// if the CPU splits constants across multiple instructions).
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return (char*) -1;
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}
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// Frame information (pc, sp, fp) retrieved via ucontext
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// always looks like a C-frame according to the frame
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// conventions in frame_ppc64.hpp.
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address os::Posix::ucontext_get_pc(const ucontext_t * uc) {
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// On powerpc64, ucontext_t is not selfcontained but contains
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// a pointer to an optional substructure (mcontext_t.regs) containing the volatile
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// registers - NIP, among others.
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// This substructure may or may not be there depending where uc came from:
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// - if uc was handed over as the argument to a sigaction handler, a pointer to the
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// substructure was provided by the kernel when calling the signal handler, and
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// regs->nip can be accessed.
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// - if uc was filled by getcontext(), it is undefined - getcontext() does not fill
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// it because the volatile registers are not needed to make setcontext() work.
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// Hopefully it was zero'd out beforehand.
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guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_get_pc in sigaction context");
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return (address)uc->uc_mcontext.regs->nip;
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}
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// modify PC in ucontext.
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// Note: Only use this for an ucontext handed down to a signal handler. See comment
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// in ucontext_get_pc.
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void os::Posix::ucontext_set_pc(ucontext_t * uc, address pc) {
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guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_set_pc in sigaction context");
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uc->uc_mcontext.regs->nip = (unsigned long)pc;
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}
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static address ucontext_get_lr(const ucontext_t * uc) {
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return (address)uc->uc_mcontext.regs->link;
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}
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intptr_t* os::Linux::ucontext_get_sp(const ucontext_t * uc) {
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return (intptr_t*)uc->uc_mcontext.regs->gpr[1/*REG_SP*/];
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}
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intptr_t* os::Linux::ucontext_get_fp(const ucontext_t * uc) {
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return NULL;
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}
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static unsigned long ucontext_get_trap(const ucontext_t * uc) {
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return uc->uc_mcontext.regs->trap;
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}
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address os::fetch_frame_from_context(const void* ucVoid,
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intptr_t** ret_sp, intptr_t** ret_fp) {
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address epc;
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const ucontext_t* uc = (const ucontext_t*)ucVoid;
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if (uc != NULL) {
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epc = os::Posix::ucontext_get_pc(uc);
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if (ret_sp) *ret_sp = os::Linux::ucontext_get_sp(uc);
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if (ret_fp) *ret_fp = os::Linux::ucontext_get_fp(uc);
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} else {
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epc = NULL;
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if (ret_sp) *ret_sp = (intptr_t *)NULL;
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if (ret_fp) *ret_fp = (intptr_t *)NULL;
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}
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return epc;
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}
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frame os::fetch_frame_from_context(const void* ucVoid) {
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intptr_t* sp;
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intptr_t* fp;
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address epc = fetch_frame_from_context(ucVoid, &sp, &fp);
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return frame(sp, epc);
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}
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frame os::fetch_compiled_frame_from_context(const void* ucVoid) {
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const ucontext_t* uc = (const ucontext_t*)ucVoid;
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intptr_t* sp = os::Linux::ucontext_get_sp(uc);
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address lr = ucontext_get_lr(uc);
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return frame(sp, lr);
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}
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frame os::get_sender_for_C_frame(frame* fr) {
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if (*fr->sp() == 0) {
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// fr is the last C frame
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return frame(NULL, NULL);
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}
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return frame(fr->sender_sp(), fr->sender_pc());
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}
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frame os::current_frame() {
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intptr_t* csp = *(intptr_t**) __builtin_frame_address(0);
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frame topframe(csp, CAST_FROM_FN_PTR(address, os::current_frame));
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return os::get_sender_for_C_frame(&topframe);
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}
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bool PosixSignals::pd_hotspot_signal_handler(int sig, siginfo_t* info,
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ucontext_t* uc, JavaThread* thread) {
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// Make the signal handler transaction-aware by checking the existence of a
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// second (transactional) context with MSR TS bits active. If the signal is
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// caught during a transaction, then just return to the HTM abort handler.
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// Please refer to Linux kernel document powerpc/transactional_memory.txt,
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// section "Signals".
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if (uc && uc->uc_link) {
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ucontext_t* second_uc = uc->uc_link;
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// MSR TS bits are 29 and 30 (Power ISA, v2.07B, Book III-S, pp. 857-858,
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// 3.2.1 "Machine State Register"), however note that ISA notation for bit
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// numbering is MSB 0, so for normal bit numbering (LSB 0) they come to be
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// bits 33 and 34. It's not related to endianness, just a notation matter.
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if (second_uc->uc_mcontext.regs->msr & 0x600000000) {
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if (TraceTraps) {
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tty->print_cr("caught signal in transaction, "
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"ignoring to jump to abort handler");
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}
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// Return control to the HTM abort handler.
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return true;
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}
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}
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// decide if this trap can be handled by a stub
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address stub = NULL;
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address pc = NULL;
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if (info != NULL && uc != NULL && thread != NULL) {
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pc = (address) os::Posix::ucontext_get_pc(uc);
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// Handle ALL stack overflow variations here
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if (sig == SIGSEGV) {
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// si_addr may not be valid due to a bug in the linux-ppc64 kernel (see
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// comment below). Use get_stack_bang_address instead of si_addr.
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// If SIGSEGV is caused due to a branch to an invalid address an
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// "Instruction Storage Interrupt" is generated and 'pc' (NIP) already
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// contains the invalid address. Otherwise, the SIGSEGV is caused due to
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// load/store instruction trying to load/store from/to an invalid address
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// and causing a "Data Storage Interrupt", so we inspect the instruction
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// in order to extract the faulty data address.
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address addr;
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if ((ucontext_get_trap(uc) & 0x0F00 /* no IRQ reply bits */) == 0x0400) {
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// Instruction Storage Interrupt (ISI)
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addr = pc;
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} else {
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// Data Storage Interrupt (DSI), i.e. 0x0300: extract faulty data address
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addr = ((NativeInstruction*)pc)->get_stack_bang_address(uc);
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}
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// Check if fault address is within thread stack.
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if (thread->is_in_full_stack(addr)) {
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// stack overflow
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if (os::Posix::handle_stack_overflow(thread, addr, pc, uc, &stub)) {
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return true; // continue
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}
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}
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}
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if (thread->thread_state() == _thread_in_Java) {
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// Java thread running in Java code => find exception handler if any
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// a fault inside compiled code, the interpreter, or a stub
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CodeBlob *cb = NULL;
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int stop_type = -1;
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// Handle signal from NativeJump::patch_verified_entry().
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if (sig == SIGILL && nativeInstruction_at(pc)->is_sigill_not_entrant()) {
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if (TraceTraps) {
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tty->print_cr("trap: not_entrant");
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}
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stub = SharedRuntime::get_handle_wrong_method_stub();
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}
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else if ((sig == USE_POLL_BIT_ONLY ? SIGTRAP : SIGSEGV) &&
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// A linux-ppc64 kernel before 2.6.6 doesn't set si_addr on some segfaults
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// in 64bit mode (cf. http://www.kernel.org/pub/linux/kernel/v2.6/ChangeLog-2.6.6),
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// especially when we try to read from the safepoint polling page. So the check
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// (address)info->si_addr == os::get_standard_polling_page()
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// doesn't work for us. We use:
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((NativeInstruction*)pc)->is_safepoint_poll() &&
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CodeCache::contains((void*) pc) &&
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((cb = CodeCache::find_blob(pc)) != NULL) &&
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cb->is_compiled()) {
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if (TraceTraps) {
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tty->print_cr("trap: safepoint_poll at " INTPTR_FORMAT " (%s)", p2i(pc),
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USE_POLL_BIT_ONLY ? "SIGTRAP" : "SIGSEGV");
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}
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stub = SharedRuntime::get_poll_stub(pc);
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}
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else if (UseSIGTRAP && sig == SIGTRAP &&
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((NativeInstruction*)pc)->is_safepoint_poll_return() &&
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CodeCache::contains((void*) pc) &&
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((cb = CodeCache::find_blob(pc)) != NULL) &&
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cb->is_compiled()) {
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if (TraceTraps) {
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tty->print_cr("trap: safepoint_poll at return at " INTPTR_FORMAT " (nmethod)", p2i(pc));
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}
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stub = SharedRuntime::polling_page_return_handler_blob()->entry_point();
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}
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// SIGTRAP-based ic miss check in compiled code.
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else if (sig == SIGTRAP && TrapBasedICMissChecks &&
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nativeInstruction_at(pc)->is_sigtrap_ic_miss_check()) {
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if (TraceTraps) {
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tty->print_cr("trap: ic_miss_check at " INTPTR_FORMAT " (SIGTRAP)", p2i(pc));
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}
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stub = SharedRuntime::get_ic_miss_stub();
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}
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// SIGTRAP-based implicit null check in compiled code.
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else if (sig == SIGTRAP && TrapBasedNullChecks &&
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nativeInstruction_at(pc)->is_sigtrap_null_check()) {
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if (TraceTraps) {
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tty->print_cr("trap: null_check at " INTPTR_FORMAT " (SIGTRAP)", p2i(pc));
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}
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stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
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}
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// SIGSEGV-based implicit null check in compiled code.
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else if (sig == SIGSEGV && ImplicitNullChecks &&
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CodeCache::contains((void*) pc) &&
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MacroAssembler::uses_implicit_null_check(info->si_addr)) {
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if (TraceTraps) {
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tty->print_cr("trap: null_check at " INTPTR_FORMAT " (SIGSEGV)", p2i(pc));
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}
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stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
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}
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#ifdef COMPILER2
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// SIGTRAP-based implicit range check in compiled code.
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else if (sig == SIGTRAP && TrapBasedRangeChecks &&
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nativeInstruction_at(pc)->is_sigtrap_range_check()) {
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if (TraceTraps) {
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tty->print_cr("trap: range_check at " INTPTR_FORMAT " (SIGTRAP)", p2i(pc));
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}
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stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
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}
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#endif
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// stop on request
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else if (sig == SIGTRAP && (stop_type = nativeInstruction_at(pc)->get_stop_type()) != -1) {
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bool msg_present = (stop_type & MacroAssembler::stop_msg_present);
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stop_type = (stop_type &~ MacroAssembler::stop_msg_present);
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const char *msg = NULL;
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switch (stop_type) {
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case MacroAssembler::stop_stop : msg = "stop"; break;
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case MacroAssembler::stop_untested : msg = "untested"; break;
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case MacroAssembler::stop_unimplemented : msg = "unimplemented"; break;
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case MacroAssembler::stop_shouldnotreachhere: msg = "shouldnotreachhere"; break;
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default: msg = "unknown"; break;
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}
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const char **detail_msg_ptr = (const char**)(pc + 4);
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const char *detail_msg = msg_present ? *detail_msg_ptr : "no details provided";
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if (TraceTraps) {
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tty->print_cr("trap: %s: %s (SIGTRAP, stop type %d)", msg, detail_msg, stop_type);
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}
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// End life with a fatal error, message and detail message and the context.
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// Note: no need to do any post-processing here (e.g. signal chaining)
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va_list va_dummy;
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VMError::report_and_die(thread, uc, NULL, 0, msg, detail_msg, va_dummy);
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va_end(va_dummy);
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ShouldNotReachHere();
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}
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else if (sig == SIGBUS) {
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// BugId 4454115: A read from a MappedByteBuffer can fault here if the
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// underlying file has been truncated. Do not crash the VM in such a case.
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CodeBlob* cb = CodeCache::find_blob(pc);
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CompiledMethod* nm = (cb != NULL) ? cb->as_compiled_method_or_null() : NULL;
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bool is_unsafe_arraycopy = (thread->doing_unsafe_access() && UnsafeCopyMemory::contains_pc(pc));
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if ((nm != NULL && nm->has_unsafe_access()) || is_unsafe_arraycopy) {
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address next_pc = pc + 4;
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if (is_unsafe_arraycopy) {
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next_pc = UnsafeCopyMemory::page_error_continue_pc(pc);
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}
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next_pc = SharedRuntime::handle_unsafe_access(thread, next_pc);
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os::Posix::ucontext_set_pc(uc, next_pc);
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return true;
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}
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}
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}
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else { // thread->thread_state() != _thread_in_Java
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if (sig == SIGILL && VM_Version::is_determine_features_test_running()) {
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// SIGILL must be caused by VM_Version::determine_features().
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*(int *)pc = 0; // patch instruction to 0 to indicate that it causes a SIGILL,
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// flushing of icache is not necessary.
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stub = pc + 4; // continue with next instruction.
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}
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else if ((thread->thread_state() == _thread_in_vm ||
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thread->thread_state() == _thread_in_native) &&
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sig == SIGBUS && thread->doing_unsafe_access()) {
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address next_pc = pc + 4;
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if (UnsafeCopyMemory::contains_pc(pc)) {
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next_pc = UnsafeCopyMemory::page_error_continue_pc(pc);
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}
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next_pc = SharedRuntime::handle_unsafe_access(thread, next_pc);
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os::Posix::ucontext_set_pc(uc, next_pc);
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return true;
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}
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}
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// jni_fast_Get<Primitive>Field can trap at certain pc's if a GC kicks in
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// and the heap gets shrunk before the field access.
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if ((sig == SIGSEGV) || (sig == SIGBUS)) {
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address addr = JNI_FastGetField::find_slowcase_pc(pc);
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if (addr != (address)-1) {
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stub = addr;
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}
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}
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}
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if (stub != NULL) {
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// Save all thread context in case we need to restore it.
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if (thread != NULL) thread->set_saved_exception_pc(pc);
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os::Posix::ucontext_set_pc(uc, stub);
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return true;
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}
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return false;
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}
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void os::Linux::init_thread_fpu_state(void) {
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// Disable FP exceptions.
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__asm__ __volatile__ ("mtfsfi 6,0");
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}
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int os::Linux::get_fpu_control_word(void) {
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// x86 has problems with FPU precision after pthread_cond_timedwait().
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// nothing to do on ppc64.
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return 0;
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}
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void os::Linux::set_fpu_control_word(int fpu_control) {
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// x86 has problems with FPU precision after pthread_cond_timedwait().
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// nothing to do on ppc64.
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}
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////////////////////////////////////////////////////////////////////////////////
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// thread stack
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// Minimum usable stack sizes required to get to user code. Space for
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// HotSpot guard pages is added later.
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size_t os::_compiler_thread_min_stack_allowed = 64 * K;
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size_t os::_java_thread_min_stack_allowed = 64 * K;
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size_t os::_vm_internal_thread_min_stack_allowed = 64 * K;
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// Return default stack size for thr_type.
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size_t os::Posix::default_stack_size(os::ThreadType thr_type) {
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// Default stack size (compiler thread needs larger stack).
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size_t s = (thr_type == os::compiler_thread ? 4 * M : 1024 * K);
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return s;
|
|
}
|
|
|
|
/////////////////////////////////////////////////////////////////////////////
|
|
// helper functions for fatal error handler
|
|
|
|
void os::print_context(outputStream *st, const void *context) {
|
|
if (context == NULL) return;
|
|
|
|
const ucontext_t* uc = (const ucontext_t*)context;
|
|
|
|
st->print_cr("Registers:");
|
|
st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->nip);
|
|
st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->link);
|
|
st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.regs->ctr);
|
|
st->cr();
|
|
for (int i = 0; i < 32; i++) {
|
|
st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.regs->gpr[i]);
|
|
if (i % 3 == 2) st->cr();
|
|
}
|
|
st->cr();
|
|
st->cr();
|
|
}
|
|
|
|
void os::print_tos_pc(outputStream *st, const void *context) {
|
|
if (context == NULL) return;
|
|
|
|
const ucontext_t* uc = (const ucontext_t*)context;
|
|
|
|
address sp = (address)os::Linux::ucontext_get_sp(uc);
|
|
print_tos(st, sp);
|
|
st->cr();
|
|
|
|
// Note: it may be unsafe to inspect memory near pc. For example, pc may
|
|
// point to garbage if entry point in an nmethod is corrupted. Leave
|
|
// this at the end, and hope for the best.
|
|
address pc = os::Posix::ucontext_get_pc(uc);
|
|
print_instructions(st, pc, /*instrsize=*/4);
|
|
st->cr();
|
|
}
|
|
|
|
void os::print_register_info(outputStream *st, const void *context) {
|
|
if (context == NULL) return;
|
|
|
|
const ucontext_t *uc = (const ucontext_t*)context;
|
|
|
|
st->print_cr("Register to memory mapping:");
|
|
st->cr();
|
|
|
|
st->print("pc ="); print_location(st, (intptr_t)uc->uc_mcontext.regs->nip);
|
|
st->print("lr ="); print_location(st, (intptr_t)uc->uc_mcontext.regs->link);
|
|
st->print("ctr ="); print_location(st, (intptr_t)uc->uc_mcontext.regs->ctr);
|
|
for (int i = 0; i < 32; i++) {
|
|
st->print("r%-2d=", i);
|
|
print_location(st, uc->uc_mcontext.regs->gpr[i]);
|
|
}
|
|
st->cr();
|
|
}
|
|
|
|
extern "C" {
|
|
int SpinPause() {
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
#ifndef PRODUCT
|
|
void os::verify_stack_alignment() {
|
|
assert(((intptr_t)os::current_stack_pointer() & (StackAlignmentInBytes-1)) == 0, "incorrect stack alignment");
|
|
}
|
|
#endif
|
|
|
|
int os::extra_bang_size_in_bytes() {
|
|
// PPC does not require the additional stack bang.
|
|
return 0;
|
|
}
|
|
|
|
#ifdef HAVE_FUNCTION_DESCRIPTORS
|
|
void* os::Linux::resolve_function_descriptor(void* p) {
|
|
return ((const FunctionDescriptor*)p)->entry();
|
|
}
|
|
#endif
|
|
|
|
void os::setup_fpu() {}
|